teaching machines

CS 352 Lecture 10 – Adders

September 28, 2016 by . Filed under cs352, fall 2016, lectures.

Dear students,

Learning is a cycle of exposing your inadequate understanding and then shoring it up. So, we start with a task to help you expose any misunderstandings:

Write the truth table for a demultiplexer, which has two inputs (in and sel) and two outputs (a and b). (So there should be how many columns?) It effectively computes this algorithm:
if sel == 0
  a = in
  b = 0
  a = 0
  b = in
Then write the HDL for a demultiplexer.

Multiplexers and demultiplexers are both connected to many other devices. However, a multiplexer is connected to many senders, choosing just one out of the bunch whose signal is propagated onward. The demultiplexer is connected to many receivers, choosing just one out of the bunch to which it sends its signal. Both components are used to implement writable memory.

We next turn to the hardware that supports one of the primary activities of a computer: adding. Let’s revisit how we add binary numbers together to get a feel for what the hardware needs to do:

Operation #1
9 + 3
Operation #2
15 + 5
Operation #3
15 + 15

How can we design hardware to support this task? Let’s start by adding together 1-bit numbers:

Design the hardware that adds two 1-bit numbers together. What are the inputs? What are the outputs? Construct a truth table with a column for each input and a column for each output. What logic do you need to compute each output?

We’ll extend these ideas to n-bit numbers. In the end, we’ll have designed a full 8-bit adder.

See you next class!